专利名称：DELAY CIRCUIT AND METHOD发明人：ANDERSON, Michael, B.,TABOR, Gregory,
A.,JANDER, Mark, J.
申请号：EP97927298.6申请日：19970623公开号：EP0908013B1公开日：20011024
摘要：The invention provides for a precise timing delay method and apparatus in whicha phase-locked loop (PLL) in combination with a timing reference is used to calibrate aprecise delay. The delays are then duplicated throughout the chip and controlled by thesame current as in the PLL. This makes the delay process, voltage, and temperatureinsensitive and the delays can be programmed by selecting the desired delay through amultiplexer. A high precision delay can be provided which is particularly advantageous foruse in devices such as computer bus isolators.
申请人：LSI LOGIC CORP
地址：US
国籍：US
代理机构：Gill, David Alan
更多信息请下载全文后查看
因篇幅问题不能全部显示，请点此查看更多更全内容