Dual damascene process

专利名称：Dual damascene process

发明人：Bang-Chien Ho,Jian-Hong Chen,Tsang-Jiuh

Wu,Li-Te Lin,Li-Chih Chao,Hua-Tai Lin,Shyue-Sheng Lu

申请号：US10915633申请日：20040810

公开号：US20050014362A1公开日：20050120

专利附图：

摘要：A method of fabricating semiconductor devices using dual damasceneprocesses to form plugs in the via holes composed of various high etch materials and

bottom anti-reflection coating (BARC) materials. After via hole etch, a layer of high etchrate plug material is spin coated to fill the via holes. Next, a layer of photoresist isapplied. The photoresist is then exposed through a mask and developed to form an etchopening. Using the remaining photoresist as an etch mask and with a bottom anti-reflection coating (BARC) as protection, the oxide or low k layer is etched to formsubsequent wiring. The etch step is known as a damascene etch step. The remainingphotoresist is removed and the trench/via openings are filled with metal forming inlaidmetal interconnect wiring and contact vias.

申请人：Bang-Chien Ho,Jian-Hong Chen,Tsang-Jiuh Wu,Li-Te Lin,Li-Chih Chao,Hua-TaiLin,Shyue-Sheng Lu

地址：Hsin-Chu TW,Hsin-Chu TW,Taichung TW,Hsin-Chu TW,Tao-Yuan TW,Yu-Kang CityTW,Hsin-Chu TW

国籍：TW,TW,TW,TW,TW,TW,TW

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