专利名称：Method and device for generating a digital
data signal and use thereof
发明人：Dirk Scheideler,Otto Schumacher,Karthik
Gopalakrishnan
申请号：US12058671申请日：20080329公开号：US07902876B2公开日：20110308
专利附图：
摘要：In an embodiment, the present invention relates to an integrated circuitcomprising at least one data signal input (data, data), at least one clock signal input
(Clock), at least one control signal input (Cnt_del, Cnt_del) and a data signal output(Data_out). According to the invention, the integrated circuit is configured to provide adigital data signal having a variable symbol duration at its output (Data_out), the symbolduration being controllable by means of the control signal (Cnt_del, Cnt_del). A furtherembodiment of the invention relates to a method for generating a digital data signalhaving a variable symbol duration in which an output signal is generated by at least onefirst data signal, at least one first clock signal and at least one control signal. For thispurpose, at least one second clock signal is generated from the first clock signal, thesecond clock signal having a variable delay and the delay being set depending on thevalue of the at least one control signal. The output signal is formed from the at least onefirst data signal, whereby the outputting is carried out edge-synchronously to the firstand the second clock signal.
申请人：Dirk Scheideler,Otto Schumacher,Karthik Gopalakrishnan
地址：Munich DE,Dachau DE,San Jose CA US
国籍：DE,DE,US
代理机构：Patterson & Sheridan, LLP
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